搜索资源列表
异步串行口
- 一种基于VHDL语言的实现计算机串行通信的简洁设计
VHDL语言的UART串行接口芯片设计程序清
- Ｕart 程序，用VHDL语言编写。
CPLD的串口程序（VHDL）
- 在CPLD上实现UART，利用VHDL进行编程。
uart全套vhdl程序
- uart全套vhdl程序 测试过，完全能用
uart.rar
- 实现串并口通信,共有发送和接受两个模块。,Strings parallel to achieve communication, send and receive a total of two modules.
UART.rar
- 该程序是用VHDL编写的串口收发控制器程序，可以实现上位机和下位机之间的串口通信,The program is prepared to use VHDL serial transceiver controller procedures, can lower PC and the serial communication between
uart.rar
- 基于vhdl的串口通信模块，即异步收发机，可实现单片机核fpga的收发串口通信，遵从rs232协议，已经调试过，很不错的资源,Vhdl-based serial communication module, that is, asynchronous transceiver can achieve single-chip transceiver nuclear fpga serial communication, rs232 to comply with the agreement, has be
uartvhdl
- VHDL语言实现的UART IP核，比较实用-VHDL language to achieve the UART IP core, more practical
FPGA_UART
- 其中讲到的是经典的VHDL的UART设计实例，而且有很详细的解释和分析，适合针对FPGA串口的开发。-Which is referred to the UART VHDL design of the classic examples, and there are detailed explanation and analysis for the serial port for FPGA development.
EP2C-SOURCE_CODE
- 有關於EP2C的一些程序(EX:I2C,FLASH,IRDA,MUSIC,LED,LIGHT,SRAM,UART,PS2,SPI )-EP2C on some of the procedures (EX: I2C, FLASH, IRDA, MUSIC, LED, LIGHT, SRAM, UART, PS2, SPI)
UART
- 语言：verilog语言 功能：通过串口控制模块，实现FPGA与串口 通信。 仿真环境：modelsim 综合环境：quartus -Language: verilog language function: through the serial port control module, FPGA and serial communication. Simulation Environment: modelsim integrated environment: quartu
rs232_VHDL
- RS232 uart的VHDL实现，包括时钟分频（波特率产生），接收，发送-Implement of RS232 uart in VHDL
uart_EP3C16_FIFO
- Verilog编写的串口RS232收发字符串程序,使用FIFO作为数据缓冲区,有效收发字符串长度为256字节,解决了利用串口调试工具与FPGA通讯只能收发单字节的问题.-Programs for uart/RS232, it can receive and transmit strings.
FPGA_VHDL_code
- FPGA学习非常珍贵的资料，包括USB、UART、I2C、Ethernet、VGA、CAN等总线的VHDL实现，可以直接应用于实际项目中。需要的请下载。 -FPGA to learn very valuable information, including USB, UART, I2C, Ethernet, VGA, CAN bus, such as VHDL to achieve, can be directly applied to actual projects. Need to do
HCIUART
- 蓝牙HCI—UART与并口的FPGA控制接口设计-Bluetooth HCI-UART and parallel port control interface of the FPGA design
UART
- URAT 部分VHDL源码 大家多多支持 哈哈 -VHDL source URAT part of U.S. support of Haha
miniUART
- 自适应波特率的通用异步串行接口电路（ＵＡＲＴ）的ＶＨＤＬ源码，在ＡＬＴＥＲＡ上运行成功-Adaptive baud rate of the universal asynchronous serial interface circuit (UART) the VHDL source code, to run successfully in ALTERA
vhdl
- 经过验证的UART硬件描述语言（VHDL）代码，非常实用。-Verified UART hardware descr iption language (VHDL) code, very useful.
micro-UARTsource_V
- UART(即Universal Asynchronous Receiver Transmitter 通用异步收发器)是广泛使用的串行数据传输协议。UART允许在串行链路上进行全双工的通信。-UART (ie Universal Asynchronous Receiver Transmitter Universal Asynchronous Receiver Transmitter) is a widely used serial data transfer protocol. UART allo
uart
- 串口通讯rs232,时钟频率为40Mhz,波特率为19200,没有奇偶校验,在xilinx XC3S200A板子上验证过.-Serial communication rs232, clock frequency of 40Mhz, the baud rate to 19200, no parity, in the board on xilinx XC3S200A verified.